TPS-Vu19p-Gd+ High Performance Fpga Platform Development Board Vu19p

• Customization: Available
• Type: Development Board
• Description: TPS-Vu19p-Gd
• Model NO.: TPS-VU19P-GD
• Demo Board Type: Arm
• Trademark: cbhioarpd
• Origin: China, Mainland China

Product Description

 

 

 

 

 

 

 

 

 

 

• The TPS-VU19P-GD+ High Performance FPGA Platform is the small form-factor, all-purpose, stand-alone system based on Xilinxs Virtex UltraScale+ XCVU19P FPGA(XCVU19P-2FSVA3824E).




• The system has 712 general purpose I/Os and 48 GTY transceivers on 8 high-speed connectors.




• On-board 2* DDR4 SO-DIMM socket supports up to 16GB memory, Speed 2400Mb/s (Use Xilinx MIG IP).




• Both I/O voltage can be adjustedto 1V, 1.2V, 1.35V, 1.5V, and 1.8V(Adjustment range: 0.95V ~ 1.85V, resolution: 50mV), it can through runtime software in GUI or change Configuration file in Card with 12 statusLEDs on-board to indicate I/O voltage.




• Both HD I/O voltage can be adjusted to 1.2V, 1.35V, 1.5V,1.8V, 2.5V and 3.3V(Adjustment range: 1.15V ~ 3V, resolution: 50mV, 3V ~ 3.4V, resolution: 100mV), it can through runtime software in GUI or change Configuration file in Card with 4 status LEDs on-board to indicate I/O voltage.




• Utilizing TPS m-View management system technology, users can download design file into FPGA and Peripheral Setting remotely through Gigabit Ethernet and USB2.0.




• Multiple FPGA configuration options through Ethernet port, USB port, JTAG and card.



•  
  
  Scalability with TPS-VU19P-GD+ High Performance FPGA Platform.
   
  
  

  • Expand multi-platform with Bridge Card.

  
  
   


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  Gigabit Ethernet
   
  
  

  • Xilinx Vivado Tool Download FPGA Design File. (Include ILA)

  
  

  • TPS m-View management system for Self-Test and FPGA Peripheral Setting.

  
  
   


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  USB2.0
   
  
  

  • Xilinx Vivado Tool Download FPGA Design File. (Include ILA)

  
  

  • TPS m-View management system for Self-Test and FPGA Peripheral Setting.

  
  
   


 

 

 

Features

 

 

Large Capacity & Scalable

 

• Up to 8,938K System logic cells and 165.9Mb of internal memory(Block Ram and Ultra Ram).




• Small form factor. (355 × 250 mm)




• On-board 2*DDR4 SO-DIMM socket supports up to 16GB memory, 2400Mb/s (Use Xilinx MIG IP).




• Multiple Logic Modules can be conveniently connected together to expand capacity by interconnection modules.



 

 

Flexible & Powerful I/Os

 

• 616 I/O pins through 4 high-speed connectors(CON1~CON4). I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in Card with 3 status LEDs on-board to indicate I/O voltage.




• 48 Gigabit transceivers and 96 HD I/O pins through 4 high-speed connector(CON5~CON8) can run up to 16Gbps(GTY), HD I/O voltage can be adjusted to1.2V, 1.35V, 1.5V, 1.8V, 2.5V or 3.3V through runtime software in GUI or change Configuration file in Card with 4 status LEDs on-board to indicate I/O voltage.




• 274HP I/O pins through 2 on-board DDR4 SO-DIMM socket. I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in Card with 3 status LEDs on-board to indicate I/O voltage.




• Total I/O Pins = 616 I/Os + 96 HD I/Os + 48 GTY+ 274 I/Os for 2* On-board DDR4 SO-DIMM socket




• I/O Voltage Adjustment range: 0.95V ~ 1.85V, resolution: 50mV




• HD I/O Voltage Adjustment range: 1.15V ~ 3.4V, resolution: 50mV (1.15~3V), resolution:100mV(3.1~3.4V)



 

 

Clock Sources Management

 

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  6 clocks to be selected from
   
  
  

  • 2 programmable clock generator for 6 clocks. (10-650MHz, 4 different frequencies)

  
  

  • 2 OSC sources for 2 programmable clock generator.

  
  

  • Clock frequency can be adjusted through runtime software in GUI or change Configuration file in Card.

  
  
   


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  4 GTY/Ref clocks to be selected from
   
  
  

  • 1 programmable clock generator for 4 GTY reference clocks. (10-650MHz, 4 different frequencies)

  
  

  • Clock frequency can be adjusted through runtime software in GUI or change Configuration file in Card.

  
  
   


 

 

Power Management

 

• 6 Group IO Connectors Power Adjustable. (4 IO Connectors + 4 HD IO Connectors for a group + 2*On-board DDR4 SO-DIMM for a group)




• Every Connector provide adjusted voltage power supply. (Each Current Driver Capacity 20A)




• 4 HD Connectors for a group provide adjusted voltage power supply. (Total Current Driver Capacity 20A)




• 2* On-board DDR4 SO-DIMM socket for a group provide adjusted voltage power supply. (Total Current Driver Capacity 20A)




• Independent provide VCC5V power supply for 8 IO Connectors shared. (Total Current Driver Capacity 20A)



 

 

High Performance

 

• Up to 200W of power for an FPGA.




• Equal trace length for I/Os from same I/O connector.



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  Speed Grade (External Loopback, through the Loopback Card)
   
  
  
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    LVDS Component Mode Performance
     
    
    

    • IO Connectors: LVDS TX/RX DDR 1200 Mbps.

    
    

    • GTY Transceiver: 16 Gbps.

    
    
     
  
  
   


 

 

High Reliability

 

• Screw Push-Pull design to I/O connectors.




• Self-Tests - Isolate design issues from board issues conveniently with a software GUI.(TPS m-View management system)




• Monitoring of on-board voltage, current and temperature with a software GUI.(TPS m-View management system)




• Automatic shut-down upon detection of over-current, over-voltage or over-temperature.



 

 

Ease-of-Use

 

• Auto diagnosis of TPSIC detect loopback card.




• FPGA configuration through the JTAG.




• Support VU19P FPGA 4 input/4 output GPIO for GUI Control.




• Virtual SWs for simple tasks such as changing a setting or indicating a condition .